Emerging Tech SIG: When Scaling Hits the End of the Road for Silicon CMOS . . . What Next?



  • Please arrive by 7:00 PM - as doors lock shortly after 7:00. You may register at the door. Thank you!


    Speaker:  Dr. Jeffrey J Welser, Director, Almaden Services Research & Accelerated Discovery Lab, IBM


    For almost half a century, the ability to achieve increased performance per dollar in semiconductor chips by scaling the dimensions of the field-effect transistor (FET) in Complimentary Metal Oxide Semiconductor (CMOS) technology has been the driving engine behind the global semiconductor industry.  

    However, in recent generations, exponentially increasing power density due to leakage currents as well as active switching energy of these nanoscale transistors is limiting our ability to reap the historical benefits of continued scaling. We are now forced to trade-off performance and density for reduced power consumption, and hence the fundamental physics of the CMOS transistor operation, rather than fabrication capability, are turning out to be the ultimate limit for future scaling. 

    Research focused on finding a new logic device that could show significant advantage over ultimate FETs in power, performance, density, and/or cost to enable the semiconductor industry to extend the historical cost and performance scaling trends has begun in earnest. So far, most candidates are slower than CMOS, and consequently are not competitive in performance when building typical CMOS architectures based on Boolean logic gates. However, many show potential for much lower energy operation – which continues to be the primary limiter for any device to scale – as well as having unique functionality, such as non-volatility or reconfigurabilty. 

    It is clear we need to take better advantage of these properties by thinking beyond the logic device itself to the circuit and architecture level.  This talk will give an overview of the current challenges in post-CMOS technology and some of the potential new directions being explored.

    SpeakerDr. Jeffrey J Welser, Director, Almaden Services Research & Accelerated Discovery Lab, IBM

    Dr. Jeffrey Welser is currently the Director of Strategy and Program Development for the IBM Research Accelerated Discovery Lab, a plug-and-play analytics lab environment for accelerating the extraction of business and scientific value from Big Data, and the Director of IBM Almaden Services Research department, managing a portfolio of research into improved business processes, software, and technology to enable IBM's Global Business and Technology Services divisions. 

    Dr. Welser received his PhD in Electrical Engineering from Stanford University in 1995, and joined IBM's Research Division at the T.J. Watson Research Center. His original work at IBM was on a variety of novel semiconductor devices, while also working at the time as an adjunct professor at Columbia University, teaching semiconductor device physics. In 2000, he took an assignment in IBM Technology group headquarters, and then joined the Microelectronics division in 2001, as project manager for the high-performance CMOS device design groups. In May 2003, he was named Director of high-performance SOI and BEOL technology development, in addition to his continuing work as the IBM Management Committee Leader for the Sony, Toshiba, and AMD development alliances. 

    In late 2003, Dr. Welser returned to the Research division as the Director of Next Generation Technology Components, looking at technology, hardware, and software components for future IT systems.  Starting in 2006, he served as the Director of the Nanoelectronics Research Initiative (NRI), a consortium of leading U.S. Semiconductor firms which partners with NIST, NSF, and state governments to support university-based research on future nanoscale logic devices to replace the CMOS transistor in the 2020 timeframe.  

    Dr. Welser is an IEEE Fellow and a member of the American Physical Society, and has served on numerous Federal agency and Congressional panels on advanced technology. He started his current role in mid-2012, and is based at the IBM Almaden Research Center in San Jose, CA.


    6:30 - 7:00 p.m. Registration / Networking / Refreshments / Pizza

    7:00 - 9:00 p.m. Presentation